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XE1205
5
DESCRIPTION
The XE1205 is a direct conversion (Zero-IF) half-duplex data transceiver. It includes receiver, transmitter, frequency
synthesizer and control logic. The circuit is intended primarily for operation in the following three ISM frequency bands
433 MHz, 868 MHz, and 915 MHz with a same 39MHz reference crystal and uses 2-level FSK modulation.
Operation of the XE1205 over the frequency range 180 MHz - 1000 MHz beyond the ISM bands described above can be
achieved by modifying the reference oscillator crystal frequency. Please contact Semtech for more details.
The XE1205 is programmed by a microcontroller through the 3-wire fully-compatible SPI serial bus (MOSI, MISO, and
SCK) to write to and read from the configuration registers.
The circuit consists of the following main functional blocks:
The receiver converts the incoming 2-level FSK modulated signal into a synchronized bit stream. The receiver comprises
a low-noise amplifier, down-conversion mixers, baseband filters, baseband amplifiers, limiters, demodulator and bit
synchronizer. The bit synchronizer transforms the data output of the demodulator into a glitch-free bit stream DATAOUT
and synchronized clock DCLK. This may be easily used to sample the DATAOUT signal with minimal external processor
overhead. In addition, the receiver includes a Received Signal Strength Indicator (RSSI) function and a Frequency Error
Indicator (FEI) function that provides an indication of the local oscillator frequency error. A pattern recognition function
may be used to detect a user-programmable reference word in the incoming bit stream. The bandwidth of the base-band
filters, the frequency deviation of the expected incoming FSK signal as well as the bit rate of the received data signal are
all user-programmable. The receiver also embeds an automatic frequency offset cancellation to compensate local
oscillator drifts due to XTAL.
The transmitter performs the modulation of the carrier by an input baseband data signal and the transmission of the
modulated signal. The frequency synthesizer is modulated directly. The modulated signal is then amplified by the on-chip
RF power amplifier. The output power is user-programmable to one of four possible values. The frequency deviation and
the bit rate for the transmit signal are the same as those programmed for the receiver section. User-defined pre-filtering
should be enabled to ensure compliance with the requirements of ETSI EN 300 220-1 regarding transmission at 25 kHz
channel spacing.
The frequency synthesizer generates the local oscillator (LO) signal for the receiver section as well as the FSK
modulated signal for the transmitter section. The core of the synthesizer is implemented with a PLL structure. The
frequency is user-programmable with a frequency resolution of approximately 500 Hz in the 433 MHz, 868 MHz and 915
MHz ISM frequency bands. This section includes a crystal oscillator whose signal is the reference for the PLL. This
reference frequency is divided by 2, 4, 8, 16, or 32 and is made available at the CLKOUT pin to serve as a clock signal
for an external processor.
The control block generates the control signals according to the setting in its set of configuration registers.
The service block performs all the necessary functions for the circuit to work properly, including the internal voltage and
current sources.
5.1
DATA OPERATION MODES
The XE1205 is user-programmable between two modes of operation:
Continuous mode : each bit transmitted or received is accessed directly at the DATA input/output pin.
Buffered mode : a 16-byte FIFO is used to store each data byte transmitted or received. This data is written to/read from
the FIFO via the SPI bus. It reduces processor overhead.
? Semtech 2008
7
www.semtech.com
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